1. Field of the Invention
The present invention relates to a circuit for removing noise components. More particularly, the present invention relates to a circuit for removing noise components included in a signal which an oscillator generates by using an integrator and hysteresis characteristic.
2. Description of the Prior Art
Electronic components such a microprocessor and a micro-controller designate a division of a state in a system definition, define every state, and perform a system operation in order to easily transport data among function blocks during the design thereof. Since such state is exclusively operated, a plurality of state divisions necessary to define the system are designated. A quartz crystal oscillator (which can be applied to the present invention) is used to generate a signal for generating the state clock. The quartz crystal oscillator is widely used for generating a signal which is inputted to a state clock generator, which generates a state clock signal necessary to drive a microprocessor.
FIG. 1 is a block diagram for showing a configuration of a state clock signal generating apparatus 10 using a quartz crystal oscillator. FIGS. 2A to 2E are waveform diagrams of signals from components in FIG. 1 when an operation of a quartz crystal oscillator circuit is normal. State clock signal generating apparatus 10 includes a quartz crystal oscillator circuit 11 and a state clock generator 13.
Quartz crystal oscillator circuit 11 includes a vibrator 111 formed by a quartz 1111 and quartz input plates 1112 and 1113; an amplifier 112 having an inverter 1121 connected to both terminals of vibrator 111 in parallel and having a feedback resistor 1122 connected to inverter 1121 in parallel; and first and second condensers 114 and 115 coupled between both terminals of vibrator 111 and a ground Vss.
A supply voltage from a power supply (not shown) is applied to vibrator 111 of quartz crystal oscillator circuit 11. Then, vibrator 111 oscillates a sine wave signal having a predetermined level and outputs a first node Nil. The output signal is applied to amplifier 112 and outputted to a second node N12. The amplified sine wave signal outputted to the second node Mn has a waveform as shown in FIG. 2A.
State clock generator 13 receives the amplified sine wave signal from quartz crystal oscillator circuit 11 and generates a normal clock signal as shown in FIG. 2B and various kinds of state clock signals S1, S2 and S3 necessary to operate a micom. Examples of state clock signals S1, S2 and S3 which state clock generator 13 generates are shown in FIGS. 2C to 2E.
In the conventional state clock signal generating apparatus 10, when quartz crystal oscillator circuit 11 is normally operated without being influenced by a circumference, quartz crystal oscillator circuit 11 oscillates a sine wave signal without noise components as shown in FIG. 2A, and state clock generator 13 generates state clock signals using the sine wave signal from quartz crystal oscillator circuit 11 and provides the generated state clock signals to an inside of a microprocessor.
FIG. 2F is a waveform diagram of the signals from components in FIG. 1 when a quartz crystal oscillator circuit generates a signal including noise components.
When an output oscillation signal including noise components of quartz crystal oscillator circuit 11 as shown in FIG. 2F is applied to the microprocessor, it deals state clock generation of the microprocessor a fatal below. That is, the microprocessor can normally be operated.
U.S. Pat. No. 3,984,703, (issued to Horace Action on Aug. 18, 1992) discloses one example of a circuit for removing a noise of an oscillator. U.S. Pat. No. 3,984,703 relates to a complementary MOS (CMOS) Schmitt trigger for deriving transfer functions having hysteresis. The input of the Schmitt trigger is applied in parallel to the gates of a plurality of stacked MOS transistors. The stacked transistors are connected with their respective source and drain electrodes in series with a source of potential and with the drain electrode of a p channel transistor being connected to the adjacent drain electrode of an n channel transistor to define an output node on which the output hysteresis signal is derived. Upper and lower trip point reference potentials are established on the respective source electrodes of the output node defining p and n channel transistors. At least one of the trip point reference potentials is gated to the respective source electrode as a function of the state of the output, i.e., whether the output is high or low. The input signal is compared in stack with the established trip point reference potentials to derive the upper and lower trip points dependent upon the signal of the change in the transfer function of the device. The output hysteresis signal is inverted and a portion of the inverted output signal is fed back via a second inverter to the output node for stabilizing the output signal. U.S. Pat. No. 3,984,703 has a transfer characteristic having hysteresis but cannot remove the noise components included in the signal oscillated by an oscillator.